一段很难的英语翻译,急求,请不要完全依靠翻译工具翻译,那样有很多错.谢谢啦

一段很难的英语翻译,急求,请不要完全依靠翻译工具翻译,那样有很多错.谢谢啦
OUT Pin
The OUT pin normally provides a digital signal related to
the voltage applied to the voltage comparator and the
threshold level shifted into an 8–bit register from an external
device. When the device is placed in the standby mode the
OUT pin is driven high and will be clocked low when an overflow
is detected from a clock divider (divide by 16384) driven
by the LFO. This allows the OUT pin to wake up an external
device such as an MCU. RST Pin
The RST pin is normally driven high and will be clocked
low when an overflow is detected from total clock divider (divide
by 16,777,216) driven by the LFO. This allows the RST
pin to reset an external device such as an MCU. This pulse
will appear on the RST pin approximately every 52 minutes
regardless of the operating mode of the device. The pulse
lasts for two cycles of the LFO oscillator as shown in Figure
5. Since the RST pin is clocked from the same divider string
as the OUT pin, there will also be a pulse on the OUT pin
when the RST pin pulses every 52 minutes. S0 Pin
The S0 pin is used to select the mode of operation as
shown in Table 1.
The S0 pin contains an internal Schmitt trigger as part of
its input to improve noise immunity. The S0 pin has an internal
pull–down device in order to provide a low level when the
pin is left unconnected.
S1 Pin
The S1 pin is used to select the mode of operation, as
shown in Table 1.
The S1 pin contains an internal Schmitt trigger as part of
its input to improve noise immunity. This pin has an internal
pulldown device to provide a low level when the pin is left unconnected.
The S1 pin also serves the purpose of enabling factory trim
and test of the device.
The higher VPP programming voltage for the internal EEPROM
trim register is also supplied through the S1 pin.
DATA Pin
The DATA pin is the serial data in (SDI) function for setting
the threshold of the voltage comparator.
The DATA pin contains an internal Schmitt trigger as part
of its input to improve noise immunity. This pin has an internal
pull–down device to provide a low level when the pin is
left unconnected.
CLK Pin
The CLK pin is used to provide a clock used for loading
and shifting data into the DATA pin. The data on the DATA pin
is clocked into a shift register on the rising edge of the CLK
pin signal. The data is transferred to the D/A Register on the
eighth falling edge of the CLK pin. This protocol may be handled
by the SPI or SIOP serial I/O function found on some
MCU devices.
The CLK pin contains an internal Schmitt trigger as part of
its input to improve noise immunity. The CLK pin has an internal
pulldown device to provide a low level when the pin is left unconnected